1. Field of the Invention.
The invention relates to non-volatile MOS memories.
2. Prior Art.
In some applications it is important to retain data stored in a random-access memory (RAM) after power is interrupted. This data may not be stored in any other location, and hence would be lost upon the failure of power. Cash registers and many other terminals are examples of where data is initially placed in RAM. If power fails before this data is stored in a more permanent memory, it would be lost.
Most often, the power supplies for these memories have considerable capacitance and even after power is lost, sufficient energy remains to operate the memory for several seconds. In non-volatile memories the loss of power is immediately sensed, and action taken to preserve the data in RAM before the energy is dissipated from the power supply.
Numerous prior art RAM cells are known which retain information when de-activated. One category of these devices employs a silicon nitride layer (MNOS devices) to selectively store charge when the cell is powered-down. Another category of non-volatile RAM cells employ electrically programmable and electrically erasable floating gate devices such as shown in U.S. Pat. No. 4,207,615.
The described invention uses the non-volatile memory cell described in co-pending application, Ser. No. 300,000, filed on Sept. 8, 1981 now U.S. Pat. No. 4,400,799, and assigned to the assignee of the present invention. This cell includes a static, bistable circuit (flip-flop) for non-volatile RAM operation and an electrically programmable and electrically erasable floating gate memory (E .sup.2 PROM) device to provide the non-volatile feature. A first sequence of signals are required to store data and a second sequence of signals are required to recall data from these cells. The present invention is directed towards an apparatus for providing these signals and other features for a non-volatile memory.
The timing apparatus of the present invention operates within the non-volatile memory in a manner analogous to a logic circuit sometimes referred to as a "state machine". State machines have been used in various applications such as for controlling the flow of data to and from a disk drive, see U.S. Pat. No. 4,210,959. Applicant is not aware of any logic circuit which employs state machines in a non-volatile memory or as used in the present invention.